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전기화학적 식각에 의한 다공성 실리콘 층에서의 기공 구조
Pore Structure in Porous Silicon Layer Prepared by Electrochemical Etching
HWAHAK KONGHAK, October 1995, 33(5), 535-543(9), NONE
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Abstract
전기화학적 방법에 의하여 제조한 다공성 실리콘층의 기공 크기 분포에 영향을 미치는 공정 조건을 찾기 위한 연구를 수행하였다. 다공성 실리콘층을 p형 실리콘 웨이퍼에 형성시켰을 경우 직경이 100Å보다 작은 미세기공들이 네트워크를 이루었으며 전기화학적 방법에 의하여 n형 실리콘 위에 형성한 기공을 화학식각 후처리를 함으로써 기공 직경을 1000Å까지 증가시킬 수 있었다.
The purpose of this study is to investigate the effect of process condition on the pore size distribution in porous silicon layer prepared by electrochemical reaction. Porous silicon layers formed on p-type silicon wafer show the network structure of fine pores of which diameters are less than 100Å. Pore diameters increased up to about 1000Å by subsequent chemical etching using n-type silicon wafers.
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