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Received July 8, 2010
Accepted September 16, 2010
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a-Si:H TFT의 누설전류 및 문턱전압 특성 연구
Leakage Current and Threshold Voltage Characteristics of a-Si:H TFT Depending on Process Conditions
광운대학교 화학공학과, 139-701 서울시 노원구 월계동 447-1
Department Of Chemical Engineering, Kwangwoon University, 447-1, Wolgye-Dong, Nowon-Gu, Seoul 139-701, Korea
Korean Chemical Engineering Research, December 2010, 48(6), 737-740(4), NONE Epub 11 January 2011
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Abstract
높은 누설 전류와 문턱 전압의 이동은 비정질 실리콘(a-Si:H) 트랜지스터(TFT)의 단점이다. 이러한 특성은 게이트 절연체와 활성층 박막의 막 특성, 표면 거칠기와 공정 조건에 따라 영향을 받는다. 본 연구의 목적은 누설 전류와 문턱 전압의 특성을 개선하는데 목적이 있다. 게이트 절연체의 공정 조건에 대해서는 질소를 증가한 증착 공정 조건을 적용하였고, 활성층의 공정 조건에 대해서는 산소를 증가한 공정 조건을 적용하여 전자 포획을 감소시키고 박막의 밀도를 증가시켰다. I(off)는 65 ℃ 조건하에서 1.01 pA에서 0.18pA로, ΔV(th)는 -1.89 V에서 -1.22V로 개선되었다
High leakage current and threshold voltage shift(ΔVth) are demerits of a-Si:H TFT. These characteristics are influenced by gate insulator and active layer film quality, surface roughness, and process conditions. The purpose of this investigation is to improve off current(Ioff) and ΔVth characteristics. Nitrogen-rich deposition condition was applied to gate insulator, and hydrogen-rich deposition condition was applied to active layer to reduce electron trap site and improve film density. I(off) improved from 1.01 pA to 0.18 pA at 65 ℃, and ΔV(th) improved from -1.89 V to 1.22 V.
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