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초미세소자의 다층배선에서 Spin-On Glass를 이용한 저온 평탄화 기술
Low Temperature Planarization Technology Using Spin-On Glass for Multilevel Interconnections in Submicron Devices
HWAHAK KONGHAK, June 1991, 29(3), 352-357(6), NONE
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Abstract
반도체 소자의 고집적화를 위한 다층배선구조에서 spin0on glass(SOG)를 이용한 저온 평탄화공정이 연구되었다. 이층배선구조에 SOG를 적용한 결과 금지대, V-홈, 공동의 문제를 해결할 수 있었고, SOG를 420℃에서 열처리를 했을 때 SOG막은 10-20%의 체적수축율을 보였으며 열처리전 보다 막내에 잔존하는 수분과 유기물의 함량이 줄어들었다. 전기적 특성은 2MV/cm의 절연파괴 전압과 30fA/cm2의 누설전류를 보였으며, 그 밖에 낮은 via 저항(≤0.2Ω/via)과 1×109 dyne/cm2의 인장응력, 80%의 평탄화율을 보였다.
Low temperature planarization technology using spin-on glass(SOG) was studied in the multilevel interconnection structures to increase the integration density of semiconductor device. The problems of forbid-den gabs, V-grooves and voids between metal line steps were solved as a result of SOG application in double level metallization structure. SOG film showed 10-20% volume shrinkage after SOG film was cured in 420℃ for 30 minutes, and it has less water and organic matter than before curing. 2MV/cm breakdown voltage and 30fA/cm2 leakage current were also obtained from the semiconductor parameter analyzer. In addition, this process showed low via resistance(≤0.2Ω/via), 1×109 dyne/cm2 tensile stress and 80% degree of planari-zation.
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